Registers, ALU, and Buses

Real-world analogy

What is it?

Registers are small, fast storage locations inside the CPU that hold data being actively processed. The ALU (Arithmetic Logic Unit) is the computational engine that performs all arithmetic and logic operations. Buses are the communication highways: the address bus (20-bit, one-way) carries memory addresses, the data bus (16-bit, bidirectional) carries data values, and the control bus carries timing and command signals. Together, they form the core hardware architecture of the 8086 processor.

Real-world relevance

When you press a key on your keyboard, the data travels along a bus to an I/O port. The CPU reads it using an IN instruction — the address bus specifies the port number, the control bus signals an I/O read, and the data bus carries the key code into a register. The ALU might then compare it (is it Enter? Escape?) and a conditional jump decides what to do next. Every interaction with your computer — every click, every pixel, every network packet — passes through these registers, the ALU, and buses.

Key points

• What Are Registers? — Registers are tiny, ultra-fast storage locations inside the CPU. They hold the data the processor is actively working on. Accessing a register takes 0 wait states — it's the fastest storage in the entire system. The 8086 has fourteen 16-bit registers, each with a specific purpose.
• General-Purpose Registers (AX, BX, CX, DX) — These four registers can be used for arithmetic, logic, and data transfer. Each can be split into two 8-bit halves: AH/AL, BH/BL, CH/CL, DH/DL. They also have special implicit uses — AX for multiply/divide, BX for base addressing, CX as a counter, DX for I/O port addressing.
• Pointer and Index Registers — SP (Stack Pointer) tracks the top of the stack. BP (Base Pointer) accesses stack frames for function parameters. SI (Source Index) and DI (Destination Index) are used in string operations and memory addressing. These enable structured data access patterns essential for real programs.
• Segment Registers (CS, DS, SS, ES) — The 8086 uses segmented memory to access 1 MB with 16-bit registers. CS (Code Segment) pairs with IP for instruction fetch. DS (Data Segment) is the default for data access. SS (Stack Segment) pairs with SP/BP. ES (Extra Segment) is used for string destinations and extra data access.
• The FLAGS Register — FLAGS is a 16-bit register where individual bits record the result of the last operation. Key flags: ZF (zero — result was 0), CF (carry — unsigned overflow), SF (sign — result is negative), OF (overflow — signed overflow), IF (interrupt enable), DF (direction for string ops). Conditional jumps test these flags.
• The ALU — Arithmetic Logic Unit — The ALU is the CPU's calculator. It performs arithmetic (ADD, SUB, MUL, DIV, INC, DEC) and logic operations (AND, OR, XOR, NOT, shift, rotate). It takes two inputs, performs the operation, produces a result, and updates the FLAGS register. Every computation in the CPU ultimately passes through the ALU.
• The Address Bus (20 bits) — The address bus is a one-way highway from the CPU to memory. It carries the address of the memory location the CPU wants to access. The 8086 has a 20-bit address bus, allowing it to address 2^20 = 1,048,576 bytes = 1 MB of memory. The address is formed by combining a segment register and an offset.
• The Data Bus (16 bits) — The data bus is a bidirectional highway that carries actual data between the CPU and memory or I/O. The 8086 has a 16-bit data bus, so it can transfer 16 bits (one word) in a single bus cycle. This is twice the bandwidth of the 8088's 8-bit data bus, which is why the 8086 is faster for 16-bit operations.
• The Control Bus — The control bus is a collection of individual signal lines that coordinate all activity. Key signals include: RD (read), WR (write), M/IO (memory vs I/O), ALE (address latch enable), INTA (interrupt acknowledge), HOLD/HLDA (DMA), and READY (wait states). These signals synchronize the CPU, memory, and I/O devices.
• How They Work Together — A single instruction like MOV AX, [2000h] orchestrates all three: the address bus carries the 20-bit address (DS*16+2000h), the control bus signals a memory read (M/IO=1, RD=0), and the data bus carries the 16-bit value back to AX. Registers hold both the inputs and the result. The ALU is used when arithmetic or logic is involved.

Code example

; Demonstrating registers, ALU, and buses in action
; Program: Add two numbers from memory, store result

; Setup segment
MOV AX, 1000h
MOV DS, AX         ; DS = 1000h (data segment base)

; Read two values from memory (uses address + data bus)
MOV AX, [0010h]    ; Address bus: 10000h + 0010h = 10010h
                    ; Control bus: M/IO=1, RD=0
                    ; Data bus: value at 10010h -> AX

MOV BX, [0020h]    ; Address bus: 10000h + 0020h = 10020h
                    ; Data bus: value at 10020h -> BX

; ALU performs addition (entirely inside the CPU)
ADD AX, BX         ; ALU input A: AX
                    ; ALU input B: BX
                    ; ALU output: AX = AX + BX
                    ; FLAGS updated (CF, ZF, SF, OF, PF, AF)

; Store result back to memory (uses address + data bus)
MOV [0030h], AX    ; Address bus: 10000h + 0030h = 10030h
                    ; Control bus: M/IO=1, WR=0
                    ; Data bus: AX -> memory at 10030h

HLT                ; stop execution

Line-by-line walkthrough

1. 1. First we set up the data segment: MOV AX, 1000h / MOV DS, AX puts 1000h into DS. This tells the CPU that our data lives starting at physical address 10000h (1000h * 16).
2. 2. MOV AX, [0010h] triggers a memory read. The address bus carries 10010h (DS*16 + 0010h). The control bus sets M/IO=1 and RD=0. Memory places the 16-bit value on the data bus, and it flows into AX.
3. 3. MOV BX, [0020h] does the same for address 10020h. Now we have both operands in registers — fast internal storage, no bus activity needed to use them.
4. 4. ADD AX, BX is purely internal — no bus activity! The ALU takes AX and BX as inputs, adds them, puts the result in AX, and updates all arithmetic flags (CF, ZF, SF, OF, PF, AF).
5. 5. MOV [0030h], AX writes the result back to memory. The address bus carries 10030h, the data bus carries the value from AX (outbound this time), and the control bus asserts WR=0.
6. 6. HLT stops the processor. Notice how even this simple program required coordination of all three buses and the ALU — that is the essence of CPU operation.

Spot the bug

; Program to read a byte from I/O port 60h (keyboard)
; and store it in memory at DS:0100h

MOV AX, 2000h
MOV DS, AX        ; DS = 2000h

IN AX, 60h        ; read from keyboard port
MOV [0100h], AX   ; store in memory

; BUG: The keyboard port returns an 8-bit value.
; What's wrong with using AX (16-bit) here?

Explain like I'm 5

Fun fact

Hands-on challenge

More resources

• 8086 Register Organization (GeeksforGeeks)
• CPU Registers, ALU, and Buses (YouTube - Ben Eater)
• 8086 Bus Architecture (TutorialsPoint)
• How the ALU Works (Wikipedia)